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1 watt, gaas phemt mmic power amplifier, 27 ghz to 32 ghz data sheet h mc1132 rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. o ne technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.47 00 ? 2016 analog devices, inc. all rights reserved. technical support www.analog.com features saturated output power (p sat ) : 30.5 dbm at 22% power added efficiency (pae) high output ip3 : 35 db m high gain: 2 2 db dc supply: 6 v at 6 00 ma no external matching required 32- lead , 5 mm 5 mm lfcsp package applications point - to - point radios point - to - multipoint radios vsat and satcom military and space functional block dia gram 17 1 3 4 2 9 gnd nc nc gnd 5 6 rfin gnd 7 nc 8 gnd gnd 18 nc 19 gnd 20 rfout 21 gnd 22 nc 23 nc 24 gnd gnd 12 v dd1 11 nc 10 nc 13 nc 14 nc 15 v dd2 16 gnd 25 gnd 26 nc 27 nc 28 nc 29 nc 30 nc 31 v gg 32 gnd HMC1132 13528-001 package base f igure 1. general description the HMC1132 is a four - stage , gaas phemt mmic , 1 w at t power amplifier that operates between 27 ghz and 32 ghz. the HMC1132 provides 22 db of gain and 30.5 dbm of saturated output power at 22% pae from a 6 v power supply. the HMC1132 exhibits excellent linearity and it is optimized for high capacity, point - to - point and point - to - multipoint radio s ystems. the amplifier configuration and high gain make it an excellent candidate for las t stage signal amplification before the antenna. the HMC1132 amplifier input/outputs (i/os) are internally matched to 50 ?. the device is supplied in a compact, leadless qfn, 5 mm 5 mm surfa ce - mount package.
HMC1132* product page quick links last content update: 11/01/2016 comparable parts view a parametric search of comparable parts evaluation kits ? HMC1132 evaluation board documentation application notes ? an-1363: meeting biasing requirements of externally biased rf/microwave amplifiers with active bias controllers ? broadband biasing of amplifiers general application note ? mmic amplifier biasing procedure application note ? thermal management for surface mount components general application note data sheet ? HMC1132: 1 watt, gaas phemt mmic power amplifier, 27 ghz to 32 ghz data sheet tools and simulations ? HMC1132lp5de s-parameters design resources ? HMC1132 material declaration ? pcn-pdn information ? quality and reliability ? symbols and footprints discussions view all HMC1132 engineerzone discussions sample and buy visit the product page to see pricing options technical support submit a technical question or find your regional support number * this page was dynamically generated by analog devices, inc. and inserted into this data sheet. note: dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. this content may be frequently modified.
HMC1132 data sheet rev. 0 | page 2 of 14 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 electrical specifications ............................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptio ns ............................. 5 interface schematics .....................................................................5 typical performance characteristics ..............................................6 theory of operation ...................................................................... 10 applications information ............................................................... 11 a pplication circuit ...................................................................... 11 evaluation board ............................................................................ 12 bill of materials ........................................................................... 12 evaluation board schematic ..................................................... 13 outline dimensions ....................................................................... 14 ordering guide ............................................................................... 14 revision history 7/2016r evision 0 : initial version
data sheet h mc1132 rev. 0 | page 3 of 14 specifications electrical specifica tions t a = 25c, v dd = v dd 1 = v dd 2 = 6 v, i dd = 6 00 ma. table 1. parameter symbol min typ max unit test conditions/comments frequency range 27 32 ghz gain 20 22 db gain variation over temperature 0.036 db/c return loss input 6 db output 14 db power output power for 1 db compression p 1db 28 30 dbm saturated output pow er p sat 30.5 db m output third - order intercept ip3 35 dbm measurement taken at 6 v at 600 ma, p out tone = 20 dbm supply voltage v dd 4 6 v quiescent supply current i dd 400 700 ma
HMC1132 data sheet rev. 0 | page 4 of 14 absolute maximum rat ings table 2. param eter rating drain voltage bias 6.5 v rf input power (rfin) 1 18 dbm channel temperature 175c continuous p diss (t = 85 c ) (derate 61 mw/ c a bove 85 c ) 5.49 w thermal resistance (r th ) junction to ground paddle 16.4c /w maximum peak reflow temperature storage temperature range operating temperature range esd sensitivity (human body model) 260 c ? 40c to +150c ?40 c to +85 c class 0, p assed 150 v 1 maximum p in is limited to 18 dbm or thermal limits constrained by maximum power dissipation (see figure 31 ), whichever is lower. s tresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution
data sheet h mc1132 rev. 0 | page 5 of 14 pin configuration and function descripti ons 17 1 3 4 2 9 gnd nc nc gnd 5 6 rfin gnd 7 nc 8 gnd gnd 18 nc 19 gnd 20 rfout 21 gnd 22 nc 23 nc 24 gnd gnd 12 v dd 1 11 nc 10 nc 13 nc 14 nc 15 v dd 2 16 gnd 25 gnd 26 nc 27 nc 28 nc 29 nc 30 nc 31 v gg 32 gnd HMC1132 top view (not to scale) notes 1. nc = no connect. 2. exposed pad. exposed pad must be connected to rf/dc ground. 13528-002 f igure 2 . pin configuration table 3. p ad function descriptions pin no. m nemonic description 1, 4, 6, 8, 9, 16, 17, 19, 21, 24, 25, 32 gnd ground. these pins are exposed ground paddles that must be connected to rf/dc ground. 2, 3, 7, 10, 11, 13, 14, 18, 22, 23, 26 to 30 nc no connect. these pins are not connected internally. however, all data was measured with these pins connected to rf/dc ground externally. 5 rfin rf input. this pin is dc - coupled and matched to 50 ? . see figure 4 for the rfin interface schematic. 12, 15 v dd1 , v dd2 drain bias voltage . external by pass capacitors of 100 pf, 10 nf, and 4.7 f are required. see figure 5 for the v dd1 and v dd2 interface schematic. 20 rfout rf output. this pin is ac - coupled and matched to 50 ? . see figure 6 for the rfout interface schematic. 31 v gg gate control for amplifier . adjust v gg to achieve the recommended bias current. external bypass c apacitors of 100 pf, 10 nf, and 4.7 f are required. see figure 7 for the v gg interface schematic. epad exposed paddl e. the exposed pad must be connected to rf/dc ground. interface schematics gnd 13528-003 figure 3 . gnd interface rfin 13528-004 figure 4 . rfin interface v dd1 ,v dd2 13528-005 figure 5 . v dd1 and v dd2 i nterface rfout 13528-006 figure 6 . rfout interface v gg 13528-007 figure 7 . v gg interface
HMC1132 data sheet rev. 0 | page 6 of 14 typical performance characteristics 30 ?30 ?20 ?10 0 10 20 25 26 27 28 29 30 31 32 33 34 response (db) frequency (ghz) s22 s21 s11 13528-008 figure 8 . broadband gain and return loss vs. frequency 0 ?16 ?12 ?14 ?10 ?8 ?6 ?4 ?2 27 28 29 30 31 32 33 34 return loss (db) frequency (ghz) +85c +25c ?40c 13528-009 figure 9 . input return loss vs. frequency at various temperature s 35 25 27 29 31 33 26 27 28 29 30 31 32 33 p1db (dbm) frequency (ghz) +85c +25c ?40c 13528-010 figure 10 . p1db vs. frequency at various temperature s 28 14 18 16 20 22 24 26 27 28 29 30 31 32 33 34 gain (db) frequency (ghz) +85c +25c ?40c 13528-0 11 figure 11 . gain vs. frequency at various temperature s 0 ?25 ?20 ?15 ?10 ?5 27 28 29 30 31 32 33 34 return loss (db) frequency (ghz) +85c +25c ?40c 13528-012 figure 12 . output return loss vs. frequency at various temperature s 35 25 27 29 31 33 26 27 28 29 30 31 32 33 p1db (dbm) frequency (ghz) 5v 5.5v 6v 13528-013 figure 13 . p1db vs. frequency at various supply voltage s
data sheet h mc1132 rev. 0 | page 7 of 14 35 25 27 29 31 33 26 27 28 29 30 31 32 33 p sat (dbm) frequency (ghz) +85c +25c ?40c 13528-014 figure 14 . p sat vs. frequency at various temperature s 35 25 27 29 31 33 26 27 28 29 30 31 32 33 p1db (dbm) frequency (ghz) 500ma 600ma 700ma 13528-015 figure 15 . p1db vs. frequency at various supply current s (i dd ) 40 20 25 30 35 26 27 28 29 30 31 32 33 ip3 (dbm) frequency (ghz) +85c +25c ?40c 13528-016 figure 16 . ou tput ip3 vs. frequency at various temperature s, p out /tone = 20 dbm 35 25 27 29 31 33 26 27 28 29 30 31 32 33 p sat (dbm) frequency (ghz) 5v 5.5v 6v 13528-017 figure 17 . p sat vs. frequency at various supply voltage s 35 25 27 29 31 33 26 27 28 29 30 31 32 33 p sat (dbm) frequency (ghz) 500ma 600ma 700ma 13528-018 figure 18 . p sat vs. frequency at various supply current s (i dd ) 40 20 25 30 35 26 27 28 29 30 31 32 33 ip3 (dbm) frequency (ghz) 500ma 600ma 700ma 13528-019 figu re 19 . output ip3 vs. frequency at various supply current s, p out /tone = 20 dbm
HMC1132 data sheet rev. 0 | page 8 of 14 40 20 25 30 35 26 27 28 29 30 31 32 33 ip3 (dbm) frequency (ghz) 5v 5.5v 6v 13528-020 figure 20 . output ip3 vs. frequency at various supply voltage s , p out /tone = 20 dbm 60 0 10 30 50 20 40 10 12 14 16 18 20 22 24 im3 (dbc) p out /tone (dbm) 27ghz 28ghz 29ghz 30ghz 31ghz 32ghz 13528-021 figure 21 . output third - order intermodulation distortion ( im3 ) at v dd = 5.5 v 40 0 5 25 35 15 10 20 30 1000 500 625 750 875 ?10 ?8 ?6 ?2 2 6 10 ?4 0 4 8 12 14 p out (dbm), gain (db), pae (%) i dd (ma) input power (dbm) p out gain pae i dd 13528-022 figure 22 . power compression at 27 ghz 60 0 10 30 50 20 40 10 12 14 16 18 20 22 24 im3 (dbc) p out /tone (dbm) 27ghz 28ghz 29ghz 30ghz 31ghz 32ghz 13528-023 figure 23 . output im3 at v dd = 5 v 60 0 10 30 50 20 40 10 12 14 16 18 20 22 24 im3 (dbc) p out /tone (dbm) 27ghz 28ghz 29ghz 30ghz 31ghz 32ghz 13528-024 figure 24 . output im3 at v dd = 6 v 40 0 5 25 35 15 10 20 30 1000 500 625 750 875 ?10 ?8 ?6 ?2 2 6 10 ?4 0 4 8 12 14 p out (dbm), gain (db), pae (%) i dd (ma) input power (dbm) p out gain pae i dd 13528-025 figure 25 . power compression at 29.5 ghz
data sheet h mc1132 rev. 0 | page 9 of 14 40 0 5 25 35 15 10 20 30 1000 500 625 750 875 ?10 ?8 ?6 ?2 2 6 10 ?4 0 4 8 12 14 p out (dbm), gain (db), pae (%) i dd (ma) input power (dbm) p out gain pae i dd 13528-026 figure 26 . power compression at 32 ghz 40 15 20 25 30 35 500 550 600 650 700 gain (db), p1db (dbm), p sat (dbm) i dd (ma) gain p1db p sat 13528-027 figure 27 . gain and power vs. supply current at 29.5 ghz 0 ?80 ?50 ?60 ?70 ?40 ?30 ?20 ?10 26 27 28 29 30 31 32 3433 isolation (db) frequency (ghz) +85c +25c ?40c 13528-028 figure 28 . reverse isolation vs. frequency at various temperature s 30 0 5 10 15 20 25 26 27 28 29 30 31 32 33 pae (%) frequency (ghz) +85c +25c ?40c 13528-029 figure 29 . pae vs. frequency at various temperature s , p in = 10 dbm 40 15 20 25 30 35 5.0 5.2 5.5 5.7 6.0 gain (db), p1db (dbm), p sat (dbm) v dd (v) gain p1db p sat 13528-030 figure 30 . gain and power vs. supply voltage at 29.5 ghz 5 1 2 4 3 ?10 ?5 0 5 10 15 power dissipation (w) input power (dbm) 27ghz 28ghz 29ghz 30ghz 31ghz 32ghz 13528-031 figure 31 . power dissipation at 85c
HMC1132 data sheet rev. 0 | page 10 of 14 t heory of o peration the architecture of the HMC1132 power amplifier is shown in figur e 32. the amplifier consists of a cascade of four, single - stage amplifiers. this approach provides a high p1db as well as a high gain that is flat across the operating frequency range. v dd 1 provide s drain bias to the first three gain stages, wh ereas v dd 2 provide s drain bias to the fourth gain stage. v gg provide s gate bias to all four gain stages, allowing control of the total quiescent drain current. rfin and rfout provide dc paths to gnd as a way of increasing the overall esd robustness of the device . 13528-034 v dd1 rfin rfout v dd2 v gg f igur e 32 . architecture and simplified block diagram
data sheet h mc1132 rev. 0 | page 11 of 14 applications informa tion the HMC1132 is a gaas, phemt, mmic power amplifier. capacitive bypassing is required for v dd 1 and v dd 2 as well as for v gg (see figure 33 ). drain bias voltage must be applied to both v dd1 and v dd2 , and gate bias voltage must be applied to v gg . though the rfin and rfout ports ac couple the signal, dc paths to gnd are provided to increase the esd robustness of the device . external dc blocking of rfin and/or rfout is desirable when appreciable levels of dc ar e expected to be present. all measurements for this device were taken using the typical application circuit shown in figure 33 , configured as shown on the e valuation printed circuit board ( pcb). the following is the recommended bias sequence during power - up: 1. connect the evaluation board to ground. 2. set the gate bias voltage to ? 2 v. 3. set the drain bias voltages to 6 v. 4. increase the gate bias voltage to achieve a quiescent i dd = 600 ma. 5. apply the rf signal. the following is the recommended bias sequence during power - down: 1. turn off the rf s ignal. 2. decrease the gate bias voltage to ? 2 v to achieve an i dd = 0 ma (approximately). 3. decrease the drain bias voltages to 0 v. 4. increase the gate bias voltage to 0 v. the v dd = 6 v and i dd = 600 ma bias conditions are the operating points recommended to optimize the overall performance of the de vice . unless otherwise noted, the data shown was obtained using the recommended bias condition. operation of the HMC1132 at different bias conditions may provide performance that differs from wh at is shown in the typical performance characteristics section. biasing the HMC1132 for higher drain current typically results in higher p1db, p sat , and gain, though at the expense of increased power consumption. application circuit c23 4.7f v dd1 v gg j1 rfin j2 rfout v dd2 c13 10nf c3 100pf c25 4.7f c15 10nf c5 100pf c30 4.7f c20 10nf c10 100pf 17 1 3 4 2 9 5 6 7 8 18 19 20 21 22 23 24 12 11 10 13 14 15 16 25 26 27 28 29 30 31 32 HMC1132 13528-032 figure 33 . typical application circuit
HMC1132 data sheet rev. 0 | page 12 of 14 evaluation bo ard the HMC1132 evaluation board is a 2- layer board fabricated using rogers 4350 and best practices for high frequency rf design. the rf input and rf output traces have a 50 ? characteristic impedance. the circuit board is attached to a heat sink using sn96 solder and provid es a low thermal resistance path. components are mounted using sn63 solder allowing rework of the surface - mount components with out compromising the circuit board to heat sink attachment. the evaluation board and po p ulated components are designed to operate over the ambient temperature range of ?40c to +85c. during operation, to control the temperature of the HMC1132 , attach the evaluation board to a temperature controlled plate . for proper bias sequence, see the applications information section . the evaluation board schematic is shown in figure 35 . a fully populated and tested evaluation board (see figure 34) , i s available from a nalog devices, inc., upon request. 13528-033 2 1 figure 34 . evaluation printed circuit bo ard (pcb) bill of materials table 4 . bill of materials for evaluation pcb ev1 HMC1132lp5d item description j1 , j 2 connector , sri k connector. sri pn 25 -146-1000-92. j 3, j4 dc pins. j5, j6 connector , sri k connector. not p opulated . c3, c5, c10 100 p f capacitors, 0 402 package. c13, c15, c 20 10,000 pf capacitors, 0 402 package. c23, c25, c30 4.7 f capacitor s, case a package. u1 HMC1132 lp5de amplifier . heat s ink used for thermal transfer from the HMC1132lp5de amplifier . pcb 131393 evaluation board . circuit board material: rogers 4350.
data sheet h mc1132 rev. 0 | page 13 of 14 evaluation b oard schematic 13528-035 j3 87759-1050 9 1 3 5 7 2 4 6 8 10 vg1 vd2 vd4 vd6 vd8 vd7 vd5 vd3 vd1 vg2 87759-1050 j4 9 1 3 5 7 2 4 6 8 10 j5 k_sri-ns depop j6 k_sri-ns depop thrucal k_sri-ns j2 j1 k_sri-ns rfout rfin vd7 vd3 vg1 u1 HMC1132lp5de 27 32 26 22 25 21 15 16 14 13 12 11 10 9 17 18 23 24 19 20 28 29 30 31 8 7 6 2 1 5 4 3 rfin nc gnd gnd gnd vd1 vd2 nc nc nc nc gnd gnd nc nc vg nc nc nc gnd gnd gnd nc nc rfout nc gnd gnd gnd gnd nc nc + + + c30 4.7f c20 10nf c10 100pf c23 4.7f c13 10nf c3 100pf c5 100pf c15 10nf c25 4.7f f igure 35 . evaluation b oard schematic
HMC1132 data sheet rev. 0 | page 14 of 14 outline dimensions 08-06-2015- a 1 0.50 bsc bot t om view top view side view pin 1 indic at or 32 9 16 17 24 25 8 exposed pa d pin 1 indic at or sea ting plane coplanarity 0.08 0.30 0.25 0.18 5.10 5.00 sq 4.90 1.53 1.34 1.15 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. 0.55 0.50 0.35 0.50 min 3.15 3.00 sq 2.85 pkg-000000 3.50 ref 6 bsc f igure 36 . 32- lead lead frame chip scale package [lfcsp] 5 mm 5 mm body and 1.34 mm package height (hcp - 32- 2) dimensions shown in millimeters ordering guide model 1 temperature range msl rating 2 package description 3 , 4 package option package marking 5 HMC1132lp5de ?40 c to + 85c msl3 32- lead lead frame chip scale package [lfcsp] hcp-32-2 xxxx h1132 HMC1132lp5detr ?40c to +85c msl3 32- lead lead frame chi p scale package [lfcsp] hcp-32-2 xxxx h1132 ev1HMC1132lp5d e valuation board 1 when orderi ng the evaluation fixture only, reference the model number, ev1HMC1132lp5d . 2 maximum peak reflow temperature of 260 c. 3 HMC1132lp5de lead finish is nipdau. 4 the HMC1132lp5de is a premolded copper alloy lead frame. 5 HMC1132lp5de 4 - digit lot number is represented by xxxx. ? 2016 analog d evices, i nc. a ll ri ghts reserved. t rademarks an d registered trademarks are the property of their respective owners. d13528-0-7/16(0)

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